SMT in Line
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Surface Mount Technology in Electronics Manufacturing

A team was assembled to investigate why we are experiencing a high failure rate for chip caps in a number of products. The team members were Mike Bernard, Bill DiPoala, Tom Frayda, Wade Grana, Bruce Kaminsky, Dave O'keefe. The below is a summery of our findings and recommendations. There is no single cause for the cracking cap problem and only by addressing all of the potential causes will our problem be solved. Continual monitoring and training will be needed for a long-term solution. The topics are listed in the order we think are the most likely problem areas. The list was formulated after studying more than 20 published documents on this subject. We also considered our existing manufacturing process and design practices. Not all documents agree on the cause and effect of every type of capacitor failure. We have formulated our list based on what the majority of the documents stated and our own observations. Two documents stand out as being most applicable to us and are not too technical for general consumption. The two documents should be used as handouts during training.

Production Process: There are two main causes for cracked capacitors in our production process; mechanical (flex) stress and thermal stress. Mechanical stresses are by far the most likely source of our failures. Each and every step in our process needs to be reviewed for excessive mechanical and thermal stresses.

1. Depanalizing- the "pizza cutter" (maestro) subjects components to high mechanical stresses. The capacitor manufacturers do not recommend this process. We recommend changing over to the board saw process. Water jet or laser depanalizers would also be acceptable. Many of the documents indicate this as the most likely source of cap damage and this recommendation should be taken seriously. We realize this will likely add cost but so does losing customers because of quality problems. Products with chip capacitors less than 0.25" from the edge should use the new process ASAP, other products should follow as equipment and tooling is available. Care should be taken not to flex the PCB during the depanalizing process for any process used. Operators should be trained immediately.
2. Test fixtures- All test and assembly fixtures should be inspected for board flexing. ICT and functional fixture test pins and clamps can exert large mechanical stresses if not properly designed and adjusted. Any board flex with a bend radius less than 400mm should be corrected. Tooling hole size and position should also be checked and adjusted so that the PCB does not bind or hang up when the board is placed on the fixture. Operators should be trained not to force the board on the fixtures.
3. Assembly conveyers - board flexing should be reduced to a minimum during the hand insertion process. Supports under the PCB may be needed. The operators should be trained so that excessive force or flex is not present. The <400mm bend radius limit should be observed.
4. Final assembly- board flex can exist in many final assembly fixtures and procedures. Operators should be trained to minimize board flex during final assembly. Every product should be reviewed for board flex at every step in the final assembly process. The <400mm bend radius limit should be observed. Appropriate steps should be taken to correct the problem. Proper technique, fixturing and custom hand tools should be utilized.
5. Test programs- test programs should be changed to monitor the yield of the chip cap failures. The fixture should stop running when a high failure rate is detected. The cause of the failures needs to be determined, corrected and documented before the fixture is reset and placed back on line.
6. QA- a monitoring system should be implemented to track failures both from the floor and the field. Corrective actions need to be made for the failures. Failures should be sent to the capacitor manufactures for analysis. They have the ability to identify what caused the failure.
7. Training- all production Engineers, line leads, assembly workers and QA personnel should be trained on this subject. A keen awareness for all the above personnel is needed in order to solve this issue.

The following four processes have been recently reviewed and although we do not think we have a problem, these processes should not be ignored or forgotten. 

8. Insertion force- the insertion force should be checked on all SMD machines. The placement force should not exceed 200gm? on any production build. Machine operators/ programmers should be trained to monitor this on a regular basis.
9. Solder temp profiles- should be monitored and controlled to the Chip cap manufacturers specs.
10. Post solder cooldown - The temperature change of the PCB should be measured and controlled to be less than 2deg C/sec during the cooldown stage.
11. Water wash shock- The PCB should be less than 60deg C before entering the water wash. Air cooling before the wash should be done with care. Temperature profiling should include the wash cycle if possible.

Design: 

1. Chip cap SM pads - Our current pad geometries conform to the IPC recommendations. The chip cap manufacturers recommend a much narrower pad in order to reduce thermal and board flex-induced stresses. All new designs should use the new improved pad geometries. Any PCB up for revision should be reviewed for possible update to the new geometries.
2. Caps near edge- a minimum of 0.030" clearance should be maintained between the PCB edge and a Chip cap. Each design should be optimized to increase the distance to 0.25" when possible. Part orientation should be optimized to reduce flex stress. The Long edge of the part should be aligned with the nearest board edge when possible. The PCB check list should include a line for the review and optimization. 
3. Cap size- some of the documents indicate that smaller package sizes are less susceptible to stress fractures than lager ones. Some documents indicate no advantage for smaller sizes. We believe size does matter, therefore the smallest possible package size should be used on new designs. 
   4) Connectors- Insertion forces caused by connectors can produce large board flex if not properly supported. Connector insertions by our production facility and the end user/installer should be considered. Proper capacitor orientation, distance to any connector and mechanical supports should be used.
4. PCB mounting- PCB's that are flexed when mounted into its chassis should be avoided. PCB mounting screws and clips should be positioned and designed to reduce or eliminate board flex. 
5. Soldering- the reflow process should be used if possible. This process produces lower thermal stress than wave soldering. 
6. Training- all PCB designers, Engineers and field repair personnel should be trained on this subject. The supervisors should train new employees. It is recommended that Design, Test and Production Engineers attend industry seminars and trade shows to keep informed on this and other potential problems. 

Reference: http://www.detectionsys.com. contact: Bruce.Kaminsky@detectionsys.com. 

(Presented by Aaron Ho 05/15/2002)